Sven Thijssen

About me

Assistant Professor
Department of Electrical Engineering & Computer Science
Florida Atlantic University

Sven Thijssen

Research interests

  • Emerging technologies
  • Neuro-symbolic AI

Journal publications

  1. [TODAES’25] Rashed, M. R. H., Thijssen, S., Jha, & Ewetz, R. (2025). LOGIC: Logic Synthesis for Digital In-Memory Computing. ACM Transactions on Design Automation of Electronic Systems.
  2. [TCAD’24] Thijssen, S., Rashed, M., Jha, S.K., and Ewetz, R. (2024). PATH: Evaluation of Boolean Logic using Path-based In-Memory Computing Systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
  3. [TCAD’23] Rashed, M. R. H., Thijssen, S., Jha, S. K., Yao, F., & Ewetz, R. (2023). STREAM: Towards READ-based In-Memory Computing for Streaming Based Processing for Data-Intensive Applications. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
  4. [TCAD’21] Thijssen, S., Jha, S. K., & Ewetz, R. (2021). COMPACT: Flow-Based Computing on Nanoscale Crossbars with Minimal Semiperimeter and Maximum Dimension. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Conference publications

  1. [ICCAD’24] Thijssen, S., Rashed, M. R. H., Ahmed, M. R., Singireddy, S. S., Jha, S. K., & Ewetz, R. (2024). Equivalence Checking for Flow-Based Computing using Iterative SAT Solving. International Conference on Computer Aided Design (ICCAD) 2024. IEEE. (accepted)
  2. [DAC’24] Thijssen, S., Rashed, M. R. H., Jha, S., & Ewetz, R. Synthesis of Compact Flow-based Computing Circuits from Boolean Expressions, Design Automation Conference (DAC) 2024. (accepted)
  3. [DAC’24] Rashed, M. R. H., Thijssen, S., Simon, D., Jha, S., & Ewetz, R., Execution Sequence Optimization for Processing In-Memory using Parallel Data Preparation, Design Automation Conference (DAC) 2024. (accepted)
  4. [ASP-DAC’24] Thijssen, S., Rashed, M. R. H., Jha, S. K., & Ewetz, R. (2024, January). READ-based In-Memory Computing using Sentential Decision Diagrams. In 2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC) (pp. 818-823). IEEE.
  5. [ASP-DAC’24] Thijssen, S., Rashed, M. R. H., Zheng, H., Jha, S. K., & Ewetz, R. (2024, January). Towards Area-Efficient Path-Based In-Memory Computing using Graph Isomorphisms. In 2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC) (pp. 812-817). IEEE.
  6. [ICCD’23] Singireddy, S., Rashed, M. R. H., Thijssen, S., Ewetz, R., & Jha, S. K. (2023, November). Input-Aware Flow-Based In-Memory Computing. In 2023 IEEE 41st International Conference on Computer Design (ICCD) (pp. 523-530). IEEE.
  7. [ICCAD’23] Rashed, M. R. H., Thijssen, S., Jha, S. K., Zheng, H., & Ewetz, R. (2023, October). Path-Based Processing using In-Memory Systolic Arrays for Accelerating Data-Intensive Applications. In 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD) (pp. 1-9). IEEE.
  8. [ICCAD’23] Thijssen, S., Singireddy, S., Rashed, M. R. H., Jha, S. K., & Ewetz, R. (2023, October). Verification of Flow-Based Computing Systems Using Bounded Model Checking. In 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD) (pp. 1-9). IEEE.
  9. [ICCAD’23] Rashed, M. R. H., Thijssen, S., Jha, S. K., & Ewetz, R. (2023, October). Automated Synthesis for In-Memory Computing. In 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD) (pp. 1-9). IEEE.
  10. [DAC’23] Thijssen, S., Rashed, M. R. H., Jha, S. K., & Ewetz, R. (2023, July). UpTime: Towards Flow-based In-Memory Computing with High Fault-Tolerance. In 2023 60th ACM/IEEE Design Automation Conference (DAC) (pp. 1-6). IEEE.
  11. [ASP-DAC’23] Thijssen, S., Jha, S. K., & Ewetz, R. (2023, January). FLOW-3D: Flow-Based Computing on 3D Nanoscale Crossbars with Minimal Semiperimeter. In Proceedings of the 28th Asia and South Pacific Design Automation Conference (pp. 775-780).
  12. [ICCD’22] Thijssen, S., Jha, S. K., & Ewetz, R. (2022, October). Equivalence Checking for Flow-Based Computing. In 2022 IEEE 40th International Conference on Computer Design (ICCD) (pp. 656-663). IEEE.
  13. [DAC’22] Thijssen, S., Jha, S. K., & Ewetz, R. (2022, July). Path: Evaluation of boolean logic using path-based in-memory computing. In Proceedings of the 59th ACM/IEEE Design Automation Conference (pp. 1129-1134).
  14. [ASP-DAC’22] Rashed, M., Thijssen, S., Yao., F., Jha, S.K., & Ewetz, R. (2022). STREAM: Towards READ-based In-Memory Computing for Streaming based Data Processing. In 2022 Asia and South Pacific Design Automation Conference (ASP-DAC).
  15. [GSLVLSI’21] Channamadhavuni, S., Thijssen, S., Jha, S. K., & Ewetz, R. (2021, June). Accelerating AI Applications using Analog In-Memory Computing: Challenges and Opportunities. In Proceedings of the 2021 on Great Lakes Symposium on VLSI (pp. 379-384).
  16. [DATE’21] Thijssen, S., Jha, S. K., & Ewetz, R. (2021, February). COMPACT: Flow-Based Computing on Nanoscale Crossbars with Minimal Semiperimeter. In 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE) (pp. 232-237). IEEE. (BEST PAPER CANDIDATE)

Awards and nominations

  1. [DATE’21] Nominated for Best Paper Award
  2. ORC Fellowship

Education

Ph.D. in Computer Science
University of Central Florida, Orlando, United States of America
PhD degree		2020 – 2024
Master of Computer Science
University of Central Florida, Orlando, United States of America
Master’s degree		2020 – 2021
Graduate courses computer science
KU Leuven, Leuven, Belgium		2018 – 2019
Bachelor of Informatics (Bachelor of Science)
KU Leuven, Leuven, Belgium
Bachelor’s degree		2015 – 2018
Undergraduate courses engineering
KU Leuven, Leuven, Belgium		2014 – 2015

Software tools

  • FACTOR: “Synthesis of Compact Flow-based Computing Circuits from Boolean Expressions” on GitHub. (coming soon)
  • ISO: “Towards Area-Efficient Path-Based In-Memory Computing using Graph Isomorphisms” on GitHub.
  • XSAT: “Verification of Flow-Based Computing Systems using Bounded Model Checking” on GitHub.
  • UpTime: “UpTime: Towards Flow-based In-Memory Computing with High Fault-Tolerance” on GitHub.
  • FLOW-3D: “FLOW-3D: Flow-Based Computing on 3D Nanoscale Crossbars with Minimal Semiperimeter” on GitHub.
  • CHECK: “Equivalence Checking for Flow-Based Computing” on GitHub.
  • PATH: “PATH: Evaluation of Boolean Logic using Path-based In-Memory Computing” on GitHub.
  • COMPACT: “COMPACT: Flow-Based Computing on Nanoscale Crossbars with Minimal Semiperimeter” on GitHub.